> ## Documentation Index
> Fetch the complete documentation index at: https://docs.veecle.ai/llms.txt
> Use this file to discover all available pages before exploring further.

# Boards

> The STM32 and Nordic boards Chiplab simulates, and the UARTs each one exposes.

Chiplab boots a virtual instance of each supported chip on open simulation platforms. Today that means [Renode](https://renode.io), with [QEMU](https://www.qemu.org) and more support planned as coverage grows. It captures the UARTs your agent asks for.

`run` takes a `board` object:

```json theme={null}
{ "model": "stm32f4_discovery", "uarts": ["usart2"] }
```

The board model is the `model` value your agent passes in `board`.
`uarts` is required. It is the list of peripherals to capture.
Only those UARTs are written into the run's `uart` artifact.
Requesting a UART the board does not expose is rejected.

See which frameworks have an example for each board on [Frameworks](/hardware/frameworks).

| Board | Chip | UART | Available UARTs |
| - | - | - | - |
| STM32F4 Discovery | STM32F407 | `usart2` | `usart1`, `usart2`, `usart3`, `uart4`, `uart5` |
| STM32F7 Discovery | STM32F746 | `usart1` `usart2` | `usart1`, `usart2`, `usart3`, `usart6` |
| STM32F103 Blue Pill | STM32F103 | `usart2` | `usart1`, `usart2`, `usart3`, `usart4`, `usart5` |
| STM32WBA52 Nucleo | STM32WBA52 | `usart1` | `usart1`, `usart2`, `lpuart1` |
| STM32L073 Nucleo | STM32L073 | `usart2` | `usart1`, `usart2`, `usart4`, `usart5`, `lpuart1` |
| STM32H745 Nucleo | STM32H745 | `usart3` | `usart1`, `usart2`, `usart3`, `uart4`, `uart5`, `usart6`, `uart7`, `uart8`, `lpuart1` |
| nRF52840 DK | nRF52840 | `uart0` | `uart0`, `uart1` |

The UART column is the peripheral the public examples write. Pass that name in `uarts`. Any name in Available UARTs can go in `uarts`.

## What simulation covers

Each board runs on a chip-accurate model of its microcontroller: the CPU, the on-chip peripherals (UART, GPIO, and the rest of the chip's peripheral registers) and the interrupt controller. Your firmware drives them exactly as it would on the real chip.

Each run executes the ELF and captures the UARTs named in `board.uarts`. A run lasts up to 5 seconds of virtual time.

> [!NOTE]
>
> Only the chip itself is modelled. External devices wired to it, such as sensors or I2C/SPI parts, are not simulated yet. Your firmware and tests observe the board through UART output.

## Don't see your chip?

Next on the roadmap: NXP S32, Renesas RA, and Infineon AURIX.

Please don't hesitate to ask. Requests really do shape what we add next.
[Open a request](https://github.com/veecle/chiplab/issues/new/choose) on GitHub with your target MCU and use case, and our team will review it, or come say hi on [Discord](https://discord.com/invite/F6GwZJ6ktP).

Call Chiplab's discovery/help tool (`ask`) to confirm the current, authoritative set of boards. It may be ahead of what's listed here.


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